// `include "fft_64.v"
`default_nettype none

module tb_fft_64;
reg         clk          ;
reg         rst_n        ;
reg         inv          ;
reg         valid_in     ;
reg         sop_in       ;
reg  signed [15:0] x_re  ;
reg  signed [15:0] x_im  ;
wire        valid_out    ;
wire        sop_out      ;
wire  signed [15:0] y_re ;
wire  signed [15:0] y_im ;
int i,j,sop_out_counter,inv_flag;
reg [5:0] counter ;

fft_64 u_fft_64(
  .clk       (clk       ),
  .rst_n     (rst_n     ),
  .inv       (inv       ),
  .valid_in  (valid_in  ),
  .sop_in    (sop_in    ),
  .x_re      (x_re      ),
  .x_im      (x_im      ),
  .valid_out (valid_out ),
  .sop_out   (sop_out   ),
  .y_re      (y_re      ),
  .y_im      (y_im      )
);


localparam CLK_PERIOD = 10;
always #(CLK_PERIOD/2) clk=~clk;

integer xm_file, y_file;
initial begin
  // 找bug时使用的
  // xm_file = $fopen("./matlab/xm_file.txt","w");//获取文件句柄
  y_file = $fopen("./matlab/y_file.txt","w");//获取文件句柄
end

initial begin
  $dumpfile("sim/build/tb_fft_64.vcd");
  $dumpvars(0, tb_fft_64);
end

initial begin
  #1 rst_n=1'bx;clk=1'bx;
  #(CLK_PERIOD*3) rst_n=1;
  #(CLK_PERIOD*3) rst_n=0;clk=0;x_re=0;x_im=-1;valid_in=0;
  repeat(5) @(posedge clk);
  inv_flag = 0;
  sop_out_counter = 0;
  counter = 0;
  rst_n=1;
  valid_in = 1;
  inv=0; //修改  inv==0 -> fft   inv==1 -> ifft
  repeat(595)  begin // 8组数据
    if (counter==0) begin
      sop_in = 1;
      inv = ~inv;
    end
    else begin
      sop_in <= 0;
    end
    x_re = x_re + 1;
    x_im = x_im + 2;
    counter = counter + 1;
    @(posedge clk);
    // 找bug时使用的
    // for (j = 1; j<=6; j++) begin
    //   if (u_fft_64.en_connect[32*j]) begin
    //     for (i = 0; i<=63; i++) begin
    //       $fwrite(xm_file,"%d\t",$signed(j));
    //       $fwrite(xm_file,"%d\t",$signed(u_fft_64.xm_real[j][i]));
    //       $fwrite(xm_file,"%d\n",$signed(u_fft_64.xm_imag[j][i]));
    //     end
    //     if (j==6) begin
    //       // $stop;
    //     end
    //   end
    // end
    sop_out_counter = sop_out_counter + sop_out;
    $fwrite(y_file,"%d\t",$signed(inv_flag));       // 标记 inv_flag==0 -> fft   inv_flag==1 -> ifft
    inv_flag = u_fft_64.inv_r[17];
    $fwrite(y_file,"%d\t",$signed(sop_out_counter));// 标记为第几组数据
    $fwrite(y_file,"%d\t",$signed(y_re));           // fft/ifft的结果 
    $fwrite(y_file,"%d\n",$signed(y_im));
  end
  $finish(2);
end

endmodule
`default_nettype wire